Verilog resources page. Includes FAQ, books and links. Also verilog aware Emacs add on.
This is the home page for a Freeware Verilog,VHDL and Analog Mixed Signal project (a.k.a. the V-2000 project, still in its infancy).
A collection of public-domain or shareware, VHDL documentation, models, and tools.
Offering a full suite of VHDL and Verilog design tools, from design-entry, simulation and synthesis to verification and training.
Provides Verilog HDL and Verilog PLI training workshops and consulting services.
Offers a VHDL compiler/simulator with an integrated development environment. Supports VHDL'93, Vital, and SDF. Free command-line tools also available.
Logic synthesis and verification products for FPGA and ASIC designers.
EASE and EALE provide HDL aware entry tools, both graphical and text based. Also providing Linux support.
Specialize in full turn-key, customer facility training programs in VHDL, Verilog,C++ modeling, formal verification, and FPGA design.
VHDL, Verilog and FPGA training courses held in the US, Europe and the UK.
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